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SH7041A 데이터시트(PDF) 739 Page - Renesas Technology Corp |
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SH7041A 데이터시트(HTML) 739 Page - Renesas Technology Corp |
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739 / 923 page ![]() 701 Automatic SCI Bit Rate Adjustment Start Bit Stop Bit D0 D1 D2 D3 D4 D5 D6 D7 High period of more than 1 bit Low period (9 bits) measured (H'00 data) Figure 22.10 Automatic SCI Bit Rate Adjustment When boot mode is initiated, the LSI measures the low period of the asynchronous SCI communication data (H'00) transmitted continuously from the host. The SCI transmit/receive format should be set as follows: 8-bit data, 1 stop bit, no parity. The LSI calculates the bit rate of the transmission from the host from the measured low period, and transmits one H'00 byte to the host to indicate the end of bit rate adjustment. The host should confirm that this adjustment end indication (H'00) has been received normally, and transmit one H'55 byte to the LSI. If reception cannot be performed normally, initiate boot mode again (reset), and repeat the above operations. Depending on the host’s transmission bit rate and the LSI’s system clock frequency, there will be a discrepancy between the bit rates of the host and the LSI. To ensure correct SCI operation, the host's transfer bit rate should be set to 9,600 or 4,800 bps. Table 22.7 shows host transfer bit rates and system clock frequencies for which automatic adjustment of the LSI bit rate is possible. The boot program should be executed within this system clock range. Table 22.7 System Clock Frequencies for which Automatic Adjustment of LSI Bit Rate is Possible Host Bit Rate System Clock Frequency for which Automatic Adjustment of LSI Bit Rate is Possible 9,600 bps 8 to 28.7 MHz 4,800 bps 4 to 20 MHz |
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