STM8S103F2 datasheet(111/121 Pages) STMICROELECTRONICS

111 / 121 page

DocID15441 Rev 14

111/121

STM8S103F2 STM8S103F3 STM8S103K3

Ordering information

115

OPT3 watchdog

OPT4 watchdog

AFR0

Reserved

AFR1

(check only one option)

[ ] 1: Port A3 alternate function = SPI_NSS and port D2

alternate function = TIM2_CH3

[ ] 0: Remapping option inactive. Default alternate functions

used. Refer to pinout description

AFR2

Reserved

AFR3

Reserved

AFR4

Reserved

AFR5

(check only one option)

[ ] 0: Remapping option inactive. Default alternate functions

used. Refer to pinout description

[ ] 1: Port D0 alternate function = CLK_CCO

AFR6

(check only one option)

[ ] 0: Remapping option inactive. Default alternate functions

used. Refer to pinout description

[ ] 1: Port D7 alternate function = TIM1_CH4

AFR7

Reserved

WWDG_HALT

(check only one option)

[ ] 0: No reset generated on halt if WWDG active[

[ ] 1: Reset generated on halt if WWDG active

WWDG_HW

(check only one option)

[ ] 0: WWDG activated by software

[ ] 1: WWDG activated by hardware

IWDG_HW

(check only one option)

[ ] 0: IWDG activated by software

[ ] 1: IWDG activated by hardware

LSI_EN

(check only one option)

[ ] 0: LSI clock is not available as CPU clock source

[ ] 1: LSI clock is available as CPU clock source

HSITRIM

(check only one option)

[ ] 0: 3-bit trimming supported in CLK_HSITRIMR register

[ ] 1: 4-bit trimming supported in CLK_HSITRIMR register

PRSC

(check only one option)

[ ] for 16 MHz to 128 kHz prescaler

[ ] for 8 MHz to 128 kHz prescaler

[ ] for 4 MHz to 128 kHz prescaler

CKAWUSEL

(check only one option)

[ ] LSI clock source selected for AWU

[ ] HSE clock with prescaler selected as clock source for AWU

EXTCLK

(check only one option)

[ ] External crystal connected to OSCIN/OSCOUT

[ ] External signal on OSCIN

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