Data Sheet

ADL5569

Rev. C | Page 19 of 23

ADL5569

AVDD 5.0V

AVDDx

DRVDDx

30Ω

50Ω

50Ω

10kΩ

VCOM

VIP

VCC

PDB

EPAD

VIN

AVDD

5.0V

10kΩ

200Ω

0.35pF

ADC

INTERNAL

INPUT Z

AD9689

30Ω

5Ω

5Ω

10Ω

10Ω

0.1µF

ANALOG

INPUT

TCM2-43X+

INPUT

Z = 50Ω

0.1µF

0.1µF

0.1µF

50Ω

50Ω

5Ω 2.7nH

2.7nH

5Ω

AVDD 3.3V

5.1nH

0.1µF

0.1µF

0.1µF

0.5pF

1pF

Figure 49. Wideband 3.2 GHz Bandwidth AC-Coupled ADC Interfacing Example: ADL5569 Driving the AD9689

Two tone intermodulation distortion performance (IMD2 and

IMD3) is shown in Figure 50. The relative pass-band frequency

response for this signal chain with a wideband antialiasing filter

is shown in Figure 51.

–80

–75

–70

–65

–60

–55

–50

–45

–40

100

200

300

400

500

600

700

800

900

1000

FREQUENCY (MHz)

IMD2

IMD3

AC-COUPLED

DC-COUPLED

NOTE: ALL TESTING WAS DONE AT –9dBFS FOR BOTH TONES.

Figure 50. Measured Two Tone IMD2/IMD3 Performance

–20

–19

–18

–17

–16

–15

–14

–13

–12

–11

–10

–9

–8

–7

–6

–5

–4

–3

–2

–1

0

10M

100M

1G

10G

FREQUENCY (MHz)

AC-COUPLED

DC-COUPLED

NOTE: ALL TESTING WAS DONE AT –3dBFS.

Figure 51. Measured Relative Frequency Response

For dc applications, special requirements must be completed for

the ADL5569 to accommodate a dc signal and level shift the

amplifier to meet the common-mode voltage requirements of

the companion converter. Figure 52 shows a 1.5 GHz design

example of the ADL5569 using dual supplies of +3.3 V for the

VCC and VCC2 pins and −2.0 V for the ground and exposed

pad (EP) pins. By using these dual supplies, the internal logic of

the power-down pins of the device (PDB and PDB2) is also

level shifted to 1.0 V to enable the device.

The example shown in Figure 52 provides a single-ended input

design, with an input common-mode voltage of 0.0 V. The

output common-mode voltage is designed to accommodate

1.4 V to interface with the AD9689 analog inputs. The

VCOM pin cannot be regarded as high-Z for the purposes of a

voltage divider calculation for the 2 kΩ and 15.4 kΩ resistors.

The 1.5 GHz bandwidth limitation of this design is not due to

any of the passive components, but it is an inherent practical

limitation of the ADL5569 and AD9689/AD9208 combination.