VSC8540RT datasheet(37/87 Pages) MICROCHIP

37 / 87 page

 2022 Microchip Technology Inc. and its subsidiaries

DS60001603E-page 37

VSC8540RT

Bit numbering follows the IEEE standard with bit 15 being the most significant bit and bit 0 being the least significant bit.

6.2

IEEE 802.3 and Main Registers

In the VSC8540RT device, the page space of the standard registers consist of the IEEE 802.3 standard registers and

the Microchip standard registers. The following table lists the names of the registers associated with the addresses as

specified by IEEE 802.3.

The following table lists the names of the registers in the main page space of the device. These registers are accessible

only when register address 31 is set to 0x0000.

TABLE 6-1:

IEEE 802.3 REGISTERS

Address

Name

Mode Control

Mode Status

PHY Identifier 1

PHY Identifier 2

Auto-negotiation Advertisement

Auto-negotiation Link Partner Ability

Auto-negotiation Expansion

Auto-negotiation Next-Page Transmit

Auto-negotiation Link Partner Next-Page

Receive

9–12

Reserved

MMD EEE Access

MMD Address or Data Register

Reserved

TABLE 6-2:

MAIN REGISTERS

Address

Name

100BASE-TX status extension

Reserved

Bypass control

Error Counter 1

Error Counter 2

Error Counter 3

Extended control and status

Extended PHY control 1

Extended PHY control 2

Interrupt mask

Interrupt status

Reserved

Auxiliary control and status

LED mode select

LED behavior

Extended register page access

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