| 전자부품 데이터시트 검색엔진 |
|
L9374LF 데이터시트(PDF) 55 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
L9374LF 데이터시트(HTML) 55 Page - STMicroelectronics |
|
55 / 80 page ![]() DocID025414 Rev 1 55/80 L9374LF Circuit description 79 Figure 36. Test failed: high resistive load / undercurrent A failed test sequence for under current condition The test sequence: 1. Disable Edge Shaping (Command address 2, bits D8 & D7 = ‘10’) 2. Initiate SVDT (Command address 2; bits D1 & D0 = ‘10’) 3. Qx switches on at the next sync-signal (sequence of actuation: Q1..Q4) 4. The output current increases but does not reach the undercurrent value, IUC. 5. After ty the output is switched off. 6. After the output is disabled if the output clamps the voltage to VZ (35V) a Dx_Loss is detected. 7. If an Over temperature is not detected then the SDVT test is passed 8. The SVDT will then test at Qx+1 until all 4 outputs have been tested. Criterion: the current value does not reach the undercurrent value within time ty SPI: Status registers 1 - 4, UC_Qx bit is set. |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |