L9374LF datasheet(23/80 Pages) STMICROELECTRONICS

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L9374LF

Circuit description

Messages from the master (μC) to the L9374LF is sent over the MOSI (Master out Slave In)

pin. Messages from the L9374LF to the master will be sent over the MISO (Master in Slave

Out) pin.

The master starts the communication with a '1'

 '0' transition on the SPICS pin. After

tLEAD,(Table 27.) the master sends a clock signal to the SPICLK and data to the MOSI pin.

The SPICLK pin must be low at the falling edge of SPICS and remain low for tLEAD for

correct communication to occur. The SPICS pin must rise after every 16 bits sent.

The MISO pin is tri-stated with an high ohmic pull-up resistor when the SPI chip select

(SPICS) pin is held high.

The SPI has the following features:



4 wire SPI (SPICS, SPICLK, MOSI, MISO)



Word length of 16-Bits (0..15)



4 address and 11 data bits and one parity bit



16 receive-buffers (11 bit wide)



16 send-buffers (11 bit wide)

4.1.1

General protocol

The protocol has the following structure:



A parity-bit at the LSB and eleven data bits (bits 1 to 11).



The four address bits are at the highest position at the transfer (bits 12 - 15).



SPI communication begins with the MSB.



High level = '1'



Low level = '0'

Figure 11. General SPI protocol



Ax: address bits



Dx: data bits



parity bit

A message from the L9374LF to the master μC (MISO) contains 4 address bits. These bits

are not a copy of the received address from the previous transmission, but are addresses

that were decoded from the address decoder. This is done so that the master (μC) has the

ability to discern the integrity of the L9374LF address decoder.

Every time an error bit in one of the SPI registers is set by the L9374LF it will remain set until

the corresponding register has been read out via SPI. Once a status register has been read

the corresponding register will be reset upon the rising edge of SPICS.

Every SPI communication writes data into a register (read only not possible). Every SPI

response is associated with the address of the message sent one communication before.

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