L9961 datasheet(36/63 Pages) STMICROELECTRONICS

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3.8

Digital IOs (RDY/SDA/SCL/FAULTN_SAFE/FAULTN/OD)

The following paragraph lists the electrical characteristics of the device digital IOs.

3.8.1

Data-ready interrupt pin (RDY)

The RDY pin is used to signal the system MCU when new data is available. The RDY signal is a positive pulse

lasting TRDY_PULSE upon the following events:

•

After each Section 3.4 Voltage conversion routine task is completed (as shown in Figure 11. I2C clock

polarity)

•

If the Coulomb counter saturates (upon CC_SAT flag positive edge, see Section 3.5.2 Coulomb counting)

•

Any time the device enters NORMAL state

Figure 10. RDY pulse generation upon voltage conversion routine task termination

GADG220620221329SA

3.8.1.1

Electrical parameters

All parameters are tested and guaranteed in the following conditions, unless otherwise noted:

VB according operating range of Table 4; TJ according operating range of Table 7.

Table 27. RDY Interrupt pin electrical parameters

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

TRDY_PULSE

RDY interruput pulse duration

Tested by SCAN

104

120

RDY

3.8.2

Fault interrupt pin (FAULTN)

The FAULTN pin indicates when a failure is detected . FAULTN is an open-drain output active low.

Several failures can be redirected to FAULTN line depending on their masking bit. Refer to Section 3.4 Voltage

conversion routine and Section 3.5 Current conversion routine for a list of specific failures.

FAULTN can also be used by a secondary protector in order to disconnect the battery pack from the load or the

charger. When not internally pulled low, FAULTN can be externally pulled low for TFAULTN_LOW: L9961 will force

the CHG/DCHG outputs low, regardless of CHG_ON and DCHG_ON commands and L9961 internal diagnostics.

The event is latched by FAULTN_EXT bit. CHG/DCHG will be released upon flag clear by MCU.

L9961

Digital IOs (RDY/SDA/SCL/FAULTN_SAFE/FAULTN/OD)

DS14012 - Rev 1

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