L9961 datasheet(40/63 Pages) STMICROELECTRONICS

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3.9.3

ACK/NACK

In a communication window, every byte transferred over the I2C bus is followed by a 9th bit representing the

acknowledge (ACK) or not acknowledge (NACK) condition. For each byte, the peripheral receiving data will either

confirm its availability to continue the communication (ACK) or will signal unavailable (NACK).

•

An ACK is represented by SDA LOW on the 9th SCL pulse

•

A NACK is represented by SDA HIGH on the 9th SCL pulse

The following conditions lead to the generation of a NACK by a receiver:

Absence of receiver: no receiver is present on the bus with the transmitted address so there is no device to

respond with an ACK

Receiver busy: the receiver is unable to receive or transmit because it is performing a real-time function and

is not ready to start communication with the master

Wrong data received: during the transfer, the receiver gets data or commands that it does not understand. If

the CRC check is enabled, L9961 will generate a NACK in case corrupted data is detected.

Receiver buffer full: during the transfer, the receiver cannot receive more data.

Transfer completed: a master-receiver must signal the end of the transfer to the slave transmitter.

When L9961 generates a NACK, the error state is latched and any subsequent write operation will not be

accomplished. The MCU is expected to issue a STOP condition to reset the I2C logic.

3.10

I2C protocol layer

3.10.1

Addressing and R/ W bit

The ADDRESS byte is formed by a 7 bit address field plus a R/ W bit:

•

By default, the ADDRESS is 0b1001001

–

The address can be changed programming the DEV_ADDR_ID register

–

The address can be stored in the NVM in order to allow the integration of L9961 on a multichip bus

•

The R/ W bit is processed as follows

–

R/ W = 1 means READ

–

R/ W = 0 means WRITE

3.10.2

CRC

L9961 can check data integrity by means of a CRC. By default, this feature is disabled and can be enabled by

programming the CRC_EN bit.

The CRC poly is: x8+x2+x+1

The CRC initialization is 0.

L9961 exploits received CRC information to validate each WRITE operation, eventually issuing a NACK and

discarding data in case of corruption detection.

In READ operations, L9961 equips the output data with CRC to allow MCU validating the received data. The MCU

may:

•

validate data on-the-fly, generating a real-time NACK in case of corruption detection

•

validate the data offline, discarding it in case of corruption detection

L9961

I2C protocol layer

DS14012 - Rev 1

page 40/63

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