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DSP56600FM/AD 데이터시트(PDF) 4 Page - NXP Semiconductors |
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DSP56600FM/AD 데이터시트(HTML) 4 Page - NXP Semiconductors |
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4 / 76 page ![]() Preliminary iv DSP56651 Technical Data Sheet MOTOROLA DSP56651 Features On-chip Memories • 4K × 32-bit MCU ROM • 512 × 32-bit MCU RAM • 24K × 24-bit DSP program ROM • 24K × 24-bit DSP program RAM • 18K × 16-bit DSP data ROM, split into 9K × 16-bit X and 9K x 16 Y data ROM spaces • 16K × 16-bit DSP data RAM, split into (7+1)K × 16-bit X and 8K x 16-bit Y data RAM spaces On-chip Peripherals • Fully programmable phase-locked loop (PLL) for DSP clock generation • External interface module (EIM) for glueless system integration • External 22-bit address and 16-bit data MCU buses • Thirty-two source MCU interrupt controller • Intelligent MCU/DSP interface (MDI) dual 1K x 16-bit RAM (shares 1K DSP X data RAM) with messaging status and control • Serial audio codec port • Serial baseband codec port • Protocol timer frees the MCU from radio channel timing events • Queued serial peripheral interface (SPI) • Keypad port capable of scanning up to an 8 × 8 matrix keypad • General-purpose MCU and DSP timers • Pulse width modulation output • Universal asynchronous receiver/transmitter (UART) with FIFO • IEEE 1149.1-compliant boundary scan JTAG test access port (TAP) • Integrated DSP/M•CORE On-Chip Emulation (OnCE™) module • DSP address bus visibility mode for system development • ISO 7816-compatible Smart Card port Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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