Preliminary

Preliminary Electrical Characteristics

Freescale Semiconductor

22

Figure 10. General Input Timing Requirements

5.7.1

FlexBus

A multi-function external bus interface called FlexBus is provided with basic functionality to interface to

slave-only devices up to a maximum bus frequency of 80MHz. It can be directly connected to

asynchronous or synchronous devices such as external boot ROMs, flash memories, gate-array logic, or

other simple target (slave) devices with little or no additional circuitry. For asynchronous devices a simple

chip-select based interface can be used. The FlexBus interface has six general purpose chip-selects

(FB_CS[5:0]) which can be configured to be distributed between the FlexBus or SDRAM memory

interfaces. Chip-select, FB_CS0 can be dedicated to boot ROM access and can be programmed to be byte

(8 bits), word (16 bits), or longword (32 bits) wide. Control signal timing is compatible with common

ROM/flash memories.

5.7.1.1

FlexBus AC Timing Characteristics

The following timing numbers indicate when data will be latched or driven onto the external bus, relative

to the system clock.

Invalid

Invalid

FB_CLK (80MHz)

TSETUP

THOLD

Input Setup And Hold

1.5V

1.5V

1.5V

Valid

Input Rise Time

Input Fall Time

* The timings are also valid for inputs sampled on the negative clock edge.

Inputs

FB_CLK

B4

B5