MCF5373CAB180 datasheet(37/42 Pages) FREESCALE

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Preliminary Electrical Characteristics

MCF5373 ColdFire® Microprocessor Data Sheet, Rev. 0.3

Preliminary

Freescale Semiconductor

The values in Table 23 correspond to Figure 26.

Figure 26. QSPI Timing

5.17 JTAG and Boundary Scan Timing

Table 23. QSPI Modules AC Timing Specifications

Name

Characteristic

Min

Max

Unit

QS1

QSPI_CS[3:0] to QSPI_CLK

510

tCYC

QS2

QSPI_CLK high to QSPI_DOUT valid.

—

QS3

QSPI_CLK high to QSPI_DOUT invalid. (Output hold)

—

QS4

QSPI_DIN to QSPI_CLK (Input setup)

—

QS5

QSPI_DIN to QSPI_CLK (Input hold)

—

Table 24. JTAG and Boundary Scan Timing

Num

Characteristics1

Symbol

Min

Max

Unit

TCLK Frequency of Operation

fJCYC

1/4

fsys/3

TCLK Cycle Period

tJCYC

4—

tCYC

TCLK Clock Pulse Width

tJCW

—

TCLK Rise and Fall Times

tJCRF

Boundary Scan Input Data Setup Time to TCLK Rise

tBSDST

4—

Boundary Scan Input Data Hold Time after TCLK Rise

tBSDHT

—

TCLK Low to Boundary Scan Output Data Valid

tBSDV

033

TCLK Low to Boundary Scan Output High Z

tBSDZ

033

TMS, TDI Input Data Setup Time to TCLK Rise

tTAPBST

4—

J10

TMS, TDI Input Data Hold Time after TCLK Rise

tTAPBHT

—

QSPI_CS[3:0]

QSPI_CLK

QSPI_DOUT

QS5

QS1

QSPI_DIN

QS3

QS4

QS2

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