MCF5373CAB180 datasheet(39/42 Pages) FREESCALE

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Preliminary Electrical Characteristics

MCF5373 ColdFire® Microprocessor Data Sheet, Rev. 0.3

Preliminary

Freescale Semiconductor

Figure 29. Test Access Port Timing

Figure 30. TRST Timing

5.18 Debug AC Timing Specifications

Table 25 lists specifications for the debug AC timing parameters shown in Figure 32.

Table 25. Debug AC Timing Specification

Num

Characteristic

Units

Min

Max

DE0

PSTCLK cycle time

—

0.3

tcyc

DE1

PST valid to PSTCLK high

—

DE2

PSTCLK high to PST invalid

1.5

—

DE3

DSCLK cycle time

—

tcyc

DE4

DSI valid to DSCLK high

—

tcyc

DE51

NOTES:

DSCLK and DSI are synchronized internally. DE4 is measured from the synchronized DSCLK input

relative to the rising edge of FB_CLK.

DSCLK high to DSO invalid

—

tcyc

DE6

BKPT input data setup time to FB_CLK high

—

DE7

FB_CLK high to BKPT invalid

—

Input Data Valid

Output Data Valid

TCLK

TDI

TDO

TMS

VIL

VIH

J10

J11

J12

J11

TCLK

TRST

J13

J14

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