MCF5373CAB180 datasheet(35/42 Pages) FREESCALE

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Preliminary Electrical Characteristics

MCF5373 ColdFire® Microprocessor Data Sheet, Rev. 0.3

Preliminary

Freescale Semiconductor

Figure 23 shows MII transmit signal timings listed in Table 19.

Figure 23. MII Transmit Signal Timing Diagram

5.14.3 MII Async Inputs Signal Timing (FEC_CRS and FEC_COL)

Table 20 lists MII asynchronous inputs signal timing.

Figure 24 shows MII asynchronous input timings listed in Table 20.

Figure 24. MII Async Inputs Timing Diagram

5.14.4 MII Serial Management Channel Timing (FEC_MDIO and

FEC_MDC)

Table 21 lists MII serial management channel timings. The FEC functions correctly with a maximum

MDC frequency of 2.5 MHz.

Table 20. MII Async Inputs Signal Timing

Num

Characteristic

Min

Max

Unit

FEC_CRS, FEC_COL minimum pulse width

1.5

—

FEC_TXCLK period

Table 21. MII Serial Management Channel Timing

Num

Characteristic

Min

Max

Unit

M10

FEC_MDC falling edge to FEC_MDIO output invalid (minimum

propagation delay)

0—

M11

FEC_MDC falling edge to FEC_MDIO output valid (max prop delay)

—

M12

FEC_MDIO (input) to FEC_MDC rising edge setup

—

M13

FEC_MDIO (input) to FEC_MDC rising edge hold

—

FEC_TXCLK (input)

FEC_TXD[3:0] (outputs)

FEC_TXEN

FEC_TXER

FEC_CRS

FEC_COL

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