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AD9549 데이터시트(PDF) 70 Page - Analog Devices

부품명 AD9549
상세설명  Dual Input Network Clock Generator/Synchronizer
PDF  78 Pages
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제조업체  AD [Analog Devices]
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AD9549 데이터시트(HTML) 70 Page - Analog Devices

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AD9549
Preliminary Technical Data
Rev. PrA | Page 70 of 78
011B – 0120; FTW Lower Limit
[47:0] FTW Lower Limit: Lowest DDS tuning word in closed loop mode. This feature is recommended when a bandpass
reconstruction filter is used. See “Output Frequency Range Control” on Page 39.
0121 – 0126; FTW Upper Limit
[47:0] FTW Upper Limit: Highest DDS tuning word in closed loop mode. This feature is recommended when a bandpass
reconstruction filter is used. See “Output Frequency Range Control” on Page 39.
0127 – 012C; Frequency Slew Limit
[47:0] Frequency Slew Limit: See “Frequency Slew Limiter” on Page 46.
012D – 0130; Reserved
Free-Run (Single-Tone) Mode
01A0 – 01A5; Reserved
01A6 – 01AB; FTW0
[47:0] FTW0: FTW (Frequency Tuning Word) for DDS when loop is not “closed” (see register 0100 bit 0)
Also used as the initial frequency estimate when the estimator is disabled (see register 0100 bit 4)
Note: The power up default is defined by startup pins S1-S4. See “Default DDS Output Frequency on Power-Up” on Page 49.
01AC – 01AD; Phase
[15:0] DDS Phase Word: Allows user to vary the phase of the DDS output. Active only when loop is not “closed.”
Reference Selector / Holdover
01C0; Automatic Control
[0] Automatic Holdover: Setting this bit permits state-machine to enter holdover (free-run) mode.
[1] Automatic Recover: Setting this bit permits state-machine to leave holdover mode.
[2] Automatic Selector: Setting this bit permits state-machine to switch the active reference clock input.
[3] Reserved
[4] Holdover Mode: This bit determines which Frequency Tuning Word (FTW) is used in Holdover Mode.
0: Use last FTW at time of holdover. 1: Use averaged FTW at time of holdover, which is the recommended setting. The number
of averages used is set in Register 01C2.



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