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IA88C00-PDW48I-R 데이터시트(PDF) 62 Page - InnovASIC, Inc |
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IA88C00-PDW48I-R 데이터시트(HTML) 62 Page - InnovASIC, Inc |
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62 / 80 page ![]() IA88C00 Data Sheet Microcontroller As of Production Version -01 Copyright © 2005 ENG21 1 030617-04 www.Innovasic Innovasic.com Innovasic Semiconductor Page 62 of 80 1.888.824.4184 Port 2 and 3 Ports 2 and 3 provide external control inputs and outputs for the UART, handshake channels and counter/timers. The pin assignments appear in Figure 60. Bits not used for control I/O can be configured as general purpose I/O lines and/or external interrupt inputs. Those bits configured for general I/O can be configured individually for input for output. Those configured for output can be individually configured for (1) input or output and (2) open drain or push pull output. Figure 60. Pin Assignments for Port 2 and 3 Port 2 Bit Function Port 3 Bit Function 0 UART receive clock 0 UART receive clock 1 UART transmit 1 UART transmit 2 Reserved 2 Reserved 3 Reserved 3 Reserved 4 Handshake 0 input 4 Handshake 1 input/WAIT 5 Handshake 0 output 5 Handshake 1 output/DM 6 Counter 0 input 6 Counter 1 input 7 Counter 0 I/O 7 Counter 1 I/O Port 4 Port 4 can be assigned as general I/O or as the lower address byte in de-mux mode. As general I/O, each bit can be configured individually as input or output, with either push-pull or open-drain outputs. I/O directions is controlled by mode control reg R246. Push-pull or open_drain selection is controlled by mode control reg R247. All Port 4 inputs are Schmitt-triggered. Port 4 can be placed under handshake control handshake channel 0. Port 4 register address is R212. UART The UART is a full-duplex asynchronous channel. It transmits and receives independently at 5 to 8 bits per character and contains options for even- or odd-bit parity and a wake-up feature. Data can be read into or out of the UART via R239, Bank 0. This single address is able to serve a full- duplex channel because it contains two complete 8-bit registers, one for the transmitter and the other for the receiver. The programming model for the UART is outlined in R235 (UART Transmit Control), R236 (UART Receive Control), R237 (UART Interrupt Enable), R238 (Transmit Interrupt Register) R248/249 bank 1 (UART Baud Rate Generator), R250/251 bank 1 (UART Mode A/B Registers). |
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