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UPSD3422 데이터시트(PDF) 254 Page - STMicroelectronics

부품명 UPSD3422
상세설명  Turbo Plus Series Fast Turbo 8032 MCU with USB and Programmable Logic
PDF  293 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

UPSD3422 데이터시트(HTML) 254 Page - STMicroelectronics

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PSD module
uPSD34xx
254/293
Figure 92.
Recommended 4-pin JTAG connections
Note:
1
For 5V uPSD34xx devices, pull-up resistors and VCC pin on the JTAG connector should be
connected to 5V system VDD.
2
For 3.3V uPSD34xx devices, pull-up resistors and VCC pin on the JTAG connector should be
connected to 3.3V system VCC.
3
This signal is driven by an Open-Drain output in the JTAG equipment, allowing more than
one source to activate RESETIN.
28.6.5
6-pin JTAG ISP (optional)
The optional signals TSTAT and TERR are programming status flags that can reduce
programming time by as much as 30% compared to 4-pin JTAG because this status
information does not have to be scanned out of the device serially. TSTAT and TERR must
be used as a pair for 6-pin JTAG operation.
●
TSTAT (pin PC3) indicates when programming of a single Flash location is complete.
Logic 1 = Ready, Logic 0 = busy.
●
TERR (pin PC4) indicates if there was a Flash programming error. Logic 1 = no error,
Logic 0 = error.
The pin functions for PC3 and PC4 must be selected as “Dedicated JTAG - TSTAT” and
“Dedicated JTAG - TERR” in PSDsoft Express to enable 6-pin JTAG ISP.
No 8032 firmware is needed to use 6-pin ISP because all ISP functions are controlled from
the external JTAG program/test equipment.
TMS - PC0
TCK - PC1
SRAM STBY or I/O - PC2
GENERAL I/O - PC3
GENERAL I/O - PC4
TDI - PC5
TDO - PC6
GENERAL I/O - PC7
JTAG
CONN.
100k
typical
TMS
TCK
TDI
TDO
GENERAL I/O
SIGNALS
GND
VCC
(1,2)
RST
(3)
uPSD34xx
0.01
µF
CIRCUIT
BOARD
JTAG
Programming
or Test
Equipment
Connects Here
10k
PUSH BUTTON
or ANY OTHER
RESET SOURCE
DEBUG
OPTIONAL
TEST POINT
100k
RESETIN
AI10457



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