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TMP88CU74F 데이터시트(PDF) 79 Page - Toshiba Semiconductor

부품명 TMP88CU74F
상세설명  CMOS 8-BIT MICROCONTROLLER
PDF  132 Pages
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제조업체  TOSHIBA [Toshiba Semiconductor]
홈페이지  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMP88CU74F 데이터시트(HTML) 79 Page - Toshiba Semiconductor

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TMP88CU74
2003-02-17
88CU74-79
Table 2.9.1 Source Clock (Internal clock) for Timer/Counter 4 (Example: at fc
= 12.5 MHz, fs = 32.8 kHz)
NORMAL1/2, IDLE1/2 Mode
DV7CK
= 0
DV7CK
= 1
DV1CK
= 0
DV1CK
= 1
DV1CK
= 0
DV1CK
= 1
TC4CK
Resolution
[
μs]
Maximum
Setting Time
[s]
Resolution
[
μs]
Maximum
Setting Time
[s]
Resolution
[
μs]
Maximum
Setting Time
[s]
Resolution
[
μs]
Maximum
Setting Time
[s]
00
01
10
163.84
μs
10.24
μs
0.64
μs
41.7 ms
2.6 ms
163.2
μs
327.68
μs
20.48
μs
1.28
μs
83.6 ms
5.2 ms
326
μs
244.14
μs
10.24
μs
0.64
μs
62.2 ms
2.6 ms
163.2
μs
244.14
μs
20.48
μs
1.28
μs
62.2 ms
5.2 ms
326
μs
SLOW, SLEEP Mode
TC4CK
Resolution
[
μs]
Maximum
Setting Time
[s]
00
01
10
244.14
μs
―
―
62.2 ms
―
―
(2) Programmable divider output (PDO) mode
The internal clock is used for counting up. The contents of TREG4 are compared with
the contents of the up-counter. If a match is found, the timer F/F 4 output is toggled
and the counter is cleared. Timer F/F 4 output is inverted and output to the P14
( PPO4 ) pin. When programmable divider output is executed, P14 output latch is set to
“1”. This mode can be used for approximate 50% duty pulse output. Timer F/F 4 can be
initialized by program, and it is initialized to “0” during reset. An INTTC4 interrupt is
generated each time the PDO output is toggled.
Example: Output a 1024 Hz pulse (at fc = 12.5 MHz)
SET
(P1). 4
;
P14 output latch
← 1
LD
(P1CR), 00010000B
;
Set output mode to P14
LD
(TREG4), 5FH
;
1/1024
÷ 2
7/fc = 5FH
LD
(TC4CR), 00010010B
;
Starts TC4
Figure 2.9.3 PDO Mode Timing Chart
4
PDO
pin output
Internal clock
Up-counter
TREG4
INTTC4 interrupt
n
0
n 0
1
2
n 0
1
Timer F/F4
1
2
n 0
1
2
1
2
n 0
Match detect
2007-10-19



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