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TMP88CU74F 데이터시트(PDF) 97 Page - Toshiba Semiconductor |
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TMP88CU74F 데이터시트(HTML) 97 Page - Toshiba Semiconductor |
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97 / 132 page ![]() TMP88CU74 2003-02-17 88CU74-97 (1) Serial clock a. Clock source The SCK(bits 2 to 0 in SBICR1) is used to select the following functions. 1. Internal clock In an internal clock mode, any of seven frequencies can be selected. The serial clock is output to the outside on the SCK0 pin. The SCK0 pin becomes a high level when data transfer starts. When writing (in the transmit mode) or reading (in the receive mode) data cannot follow the serial clock rate, an automatic-wait function is executed to stop the serial clock automatically and hold the next shift operation until reading or writing is complete. Figure 2.10.18 Automatic Wait Function 2. External clock (SCK = “111”) An external clock supplied to the SCK0 pin is used as the serial clock. In order to ensure shift operation, a pulse width of at least 4 machine cycles is required for both high and low levels in the serial clock. The maximum data transfer frequency is 390 kHz (fc = 12.5 MHz). Figure 2.10.19 The Maximum Data Transfer Frequency in the External Clock Input b. Shift edge The leading edge is used to transmit data, and the trailing edge is used to receive data. 1. Leading edge Data is shifted on the leading edge of the serial clock (at a falling edge of the SCK0 pin input/output). 2. Trailing edge Data is shifted on the trailing edge of the serial clock (at a rising edge of the SCK0 pin input/output). a0 automatic-wait function 0 SCK pin output SO0 pin output Write transmitted data a b a1 a2 a7 b0 c0 c1 c2 c 1 2 6 7 8 1 2 3 1 2 3 7 8 a6 b7 b6 b5 b1 b4 a5 0 SCK pin tSCKL tSCKH tSCKL, tSCKH > 4 tcyc Note: tcyc = 4/fc (in NORMAL mode, IDLE mode) 2007-10-19 |
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