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TMP88CU74F 데이터시트(PDF) 15 Page - Toshiba Semiconductor

부품명 TMP88CU74F
상세설명  CMOS 8-BIT MICROCONTROLLER
PDF  132 Pages
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제조업체  TOSHIBA [Toshiba Semiconductor]
홈페이지  http://www.semicon.toshiba.co.jp/eng
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TMP88CU74F 데이터시트(HTML) 15 Page - Toshiba Semiconductor

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TMP88CU74
2003-02-17
88CU74-15
1.4.4
Operating Mode Control
(1) STOP mode (STOP1, STOP2)
STOP mode is controlled by the system control register 1 (SYSCR1) and the STOP
pin input. The STOP pin is also used both as a port P20 and an INT5 (external
interrupt input 5) pin. STOP mode is started by setting STOP (bit 7 in SYSCR1) to “1”.
During STOP mode, the following status is maintained.
1.
Oscillations are turned off, and all internal operations are halted.
2.
The data memory, registers, the program status word and port output latches are
all held in the status in effect before STOP mode was entered.
3.
The prescaler and the divider of the timing generator are cleared to “0”.
4.
The program counter holds the address of the instruction but one to the
instruction (e.g.[SET (SYSCR1).7]) which started STOP mode.
STOP mode includes a level-sensitive release mode and an edge-sensitive
release mode, either of which can be selected with the RELM (bit 6 in SYSCR1).
a.
Level-sensitive release mode (RELM = “1”)
In this mode, STOP mode is released by setting the STOP pin high. This mode
is used for capacitor back-up when the main power supply is cut off and long term
battery back-up.
When the STOP pin input is high, executing an instruction which starts STOP
mode will not place in STOP mode but instead will immediately start the release
sequence (warm-up). Thus, to start STOP mode in the level-sensitive release mode,
it is necessary for the program to first confirm that the STOP pin input is low. The
following two methods can be used for confirmation.
1.
Testing a port P20.
2.
Using an external interrupt input INT5 ( INT5 is a falling edge-sensitive input).
Example 1: Starting STOP mode from NORMAL mode by testing a port P20.
LD
(SYSCR1), 01010000B
;
Sets up the level-sensitive release mode
SSTOPH:
TEST
(P2). 0
;
Wait until the STOP pin input goes low
level
JRS
F, SSTOPH
SET
(SYSCR1). 7
;
Starts STOP mode
Example 2: Starting STOP mode from NORMAL mode with an INT5 interrupt.
PINT5:
TEST
(P2). 0
;
To reject noise, STOP mode does not
start if port P20 is at high
JRS
F, SINT5
LD
(SYSCR1), 01010000B
;
Sets up the level-sensitive release mode.
SET
(SYSCR1). 7
;
Starts STOP mode
SINT5:
RETI
2007-10-19



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