TMP86CS49FG datasheet(192/252 Pages) TOSHIBA

192 / 252 page

Page 178

15. Synchronous Serial Interface (SIO2)

15.2 Control

TMP86CS49FG

15.2 Control

The SIO is controlled using the serial interface control register (SIO2CR). The operating status of the serial inter-

face can be inspected by reading the status register (SIO2CR).

Note 1: When SIO2CR<SIOINH> is set to “1”, SIO2CR<SIOS>, SIO2SR register, SIO2RDB register and SIO2TDB register are

initialized.

Note 2: Transfer mode, direction of transfer and serial clock must be select during the transfer is stopping (when SIO2SR<SIOF>

"0").

Note 3: fc: High-frequency clock [Hz], fs: Low-frequency clock [Hz], *: Don’t care

Serial Interface Control Register

SIO2CR

(0031H)

765

SIOS

SIOINH

SIOM

SIODIR

SCK

(Initial value: 0000 0000)

SIOS

Specify start/stop of transfer

0: Stop

1: Start

R/W

SIOINH

Forcibly stops transfer (Note 1)

0: –

1: Forcibly stop (Automatically cleared to "0" after stopping)

SIOM

Selects transfer mode

00: Transmit mode

01: Receive mode

10: Transmit/receive mode

11: Reserved

SIODIR

Selects direction of transfer

0: MSB (Transfer beginning with bit7)

1: LSB (Transfer beginning with bit0)

SCK

Selects serial clock

NORMAL1/2 or IDLE1/2 modes

SLOW/SLEEP

mode

TBTCR

<DV7CK> = "0"

TBTCR

<DV7CK> = "1"

000

fc/212

fs/24

001

fc/28

Reserved

010

fc/27

Reserved

011

fc/26

Reserved

100

fc/25

Reserved

101

fc/24

Reserved

110

fc/23

Reserved

111

External clock (Input from SCK2 pin)

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