| 전자부품 데이터시트 검색엔진 |
|
TMP86CS49FG 데이터시트(PDF) 209 Page - Toshiba Semiconductor |
|
|
|||||||||||||||||||||||||||||
TMP86CS49FG 데이터시트(HTML) 209 Page - Toshiba Semiconductor |
|
209 / 252 page ![]() Page 195 TMP86CS49FG 16. Serial Bus Interface(I2C Bus) Ver.-D (SBI) The TMP86CS49FG has a serial bus interface which employs an I2C bus. The serial interface is connected to an external devices through SDA and SCL. The serial bus interface pins are also used as the port. When used as serial bus interface pins, set the output latches of these pins to "1". When not used as serial bus interface pins, the port is used as a normal I/O port. Note 1: The serial bus interface can be used only in NORMAL1/2 and IDLE1/2 mode. It can not be used in IDLE0, SLOW1/2 and SLEEP0/1/2 mode. Note 2: The serial bus interface can be used only in the Standard mode of I2C. The fast mode and the high-speed mode can not be used. Note 3: Please refer to the I/O port section about the detail of setting port. 16.1 Configuration Figure 16-1 Serial Bus Interface (SBI) 16.2 Control The following registers are used for control the serial bus interface and monitor the operation status. • Serial bus interface control register A (SBICRA) • Serial bus interface control register B (SBICRB) • Serial bus interface data buffer register (SBIDBR) •I2C bus address register (I2CAR) • Serial bus interface status register A (SBISRA) • Serial bus interface status register B (SBISRB) 16.3 Software Reset A serial bus interface circuit has a software reset function, when a serial bus interface circuit is locked by an exter- nal noise, etc. To reset the serial bus interface circuit, write “10”, “01” into the SWRST (Bit1, 0 in SBICRB). And a status of software reset canbe read from SWRMON (Bit0 in SBISRA). Noise canceller Noise canceller SCL Input/ output control SDA SBI control register B/ SBI status register B SBI control register A/ SBI status register A I 2C bus address register SBI data buffer register Shift register I 2C bus data control Transfer control circuit I 2C bus clock sysn. Control Divider fc/4 SBICRB/ SBISRB I2CAR SBIDBR SBICRA/ SBISRA SCL SDA INTSBI interrupt request |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |