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D950-CORE 데이터시트(PDF) 78 Page - STMicroelectronics |
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D950-CORE 데이터시트(HTML) 78 Page - STMicroelectronics |
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78 / 89 page ![]() 78/89 D950-Core 7.4.2 I/O interface The terms input and output are related to the DMA controller, external is related to the AS- DSP. Referring to the D950-Core pin description, the interrupt controller I/O interface signals are of different types: On the D950-Core Side •HOLD (hold request / output) • HOLDACK (hold acknowledge / input) • CLK (clock / input) • INCYCLE (clock / input) On the Internal Memory Side • XA0/XA15 (Y address bus) with associated control signals (output): XRD (read / output) XWR (write / output) XBS (bus strobe / output) • YA0/YA15 (Y address bus) and YD0/YD15 (Y data bus) with their associated control signals (clock / input): YRD (read / input/output) YWR (write / input/output) YBS (bus strobe / output) • IA0/IA15 (I address bus) with associated control signals (output): IRD (read / output) IWR (write / output) IBS (bus strobe / output) On the Interrupt Controller Side • DIT(3:0) (interrupt request / output) •DIT_AND (common interrupt request / output) On the External Side •DMARQ(3:0) (request / one input per channel) • DMACK(3:0) (acknowledge / one output per channel) • DIP_ENA (DITi output enable / input) • RESET (reset / input) •DTACK (cycle extension / input), 8 |
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