STM32WB09XE datasheet(51/73 Pages) STMICROELECTRONICS

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6.3.16

I/O port characteristics

Unless otherwise specified, the parameters given in the tables below are derived from tests performed under the

conditions summarized in Table 13. All I/Os are designed as CMOS-compliant.

The characteristics below are guaranteed by characterization.

Table 36. I/O static characteristics

Symbol

Parameter

Conditions

Min.

Typ.

Max.

Unit

VIL

I/O input low level voltage

1.62 V < VDD < 3.6 V

0.3 x VDD

VIH

I/O input high level voltage

0.7 x VDD

Ilkg

Input leakage current

0 <= VIN <= Max(VDDx)(1)

+/-100

Max(VDDx)(1) <= VIN <= Max(VDDx)(1) +1 V

650

Max(VDDx)(1) + 1 V < VIN <= 5.5 V

200

RPU

Pull-up resistor

VIN = GND

kΩ

RPD

Pull-down resistor

VIN = VDD

CIO

I/O pin capacitance

1. Max(VDDx) is the maximum value among all the I/O supplies.

All I/Os are CMOS-compliant (no software configuration required).

GPIOs (general purpose input/outputs) can sink or source up to ±8 mA and sink or source up to ± 20 mA (with a

relaxed VOL / VOH).

In the user application, the number of I/O pins that can drive current must be limited to respect the absolute

maximum rating specified.

•

The sum of currents sourced by all I/Os on VDD, plus the maximum consumption of MCU sourced on VDD,

cannot exceed the absolute maximum rating ΣIVDD

•

The sum of currents sunk by all I/Os on VSS, plus the maximum consumption of the MCU sunk on GND,

cannot exceed the absolute maximum rating ΣIVGND

The characteristics below are guaranteed by characterization.

Table 37. Output voltage characteristics

Symbol

Parameter

Conditions

Min.

Max.

Unit

VOL

Output low level voltage for I/O pin

CMOS port(1) |IIO| = 8 mA VDD ≥ 2.7 V

0.4

VOH

Output high level voltage for I/O pin

VDD -0.4

VOL

Output low level voltage for I/O pin

|IIO| = 20 mA VDD ≥ 2.7 V

1.3

VOH

Output high level voltage for I/O pin

VDD -1.3

VOL

Output low level voltage for I/O pin

|IIO| = 4 mA VDD ≥ 1.62 V

0.4

VOH

Output high level voltage for I/O pin

VDD-0.45

1. CMOS outputs are compatible with JEDEC standards JESD36 and JESD52.

6.3.17

RSTN pin characteristics

The RSTN pin input driver uses CMOS technology. It is connected to a permanent pull-up resistor, RPU.

Unless otherwise specified, the parameters given in the table below are derived from tests performed under the

ambient temperature and supply voltage conditions summarized in Table 13.

The characteristics below are guaranteed by design.

STM32WB09xE

Electrical characteristics

DS14210 - Rev 6

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