DIO5907x

www.dioo.com

© 2026 Dioo Microcircuits Co., Ltd. Jiangsu

DIO5907x• Rev.1.6

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Detailed Description

Overview

The DIO5907x devices are integrated Li-Ion linear chargers and system power path management devices

targeted at space-limited portable applications. The device powers the system while simultaneously and

independently charging the battery. This feature reduces the number of charge and discharge cycles on the

battery, allows for proper charge termination and enables the system to run with a defective or absent battery

pack. This feature also allows instant system turn-on even with a totally discharged battery. The input power

source for charging the battery and running the system can be an AC adapter or a USB port. The devices

feature Dynamic Power Path Management (DPPM), which shares the source current between the system and

battery charging, and automatically reduces the charging current if the system load increases. When charging

from a USB port, the input dynamic power management (VIN-DPM) circuit reduces the input current if the input

voltage falls below a threshold, thus preventing the USB port from crashing. The power-path architecture also

permits the battery to supplement the system current requirements when the adapter cannot deliver the peak

system currents.

Under voltage lockout (UVLO)

The DIO5907x family remains in power down mode when the input voltage at the IN pin is below the under

voltage threshold (UVLO).

During the power down mode the host commands at the control inputs (/CE, EN1 and EN2) are ignored. The

Q1 FET connected between IN and OUT pins is off, and the status outputs /CHG and /PGOOD are high

impedance. The Q2 FET that connects BAT to OUT is ON. (If SYSOFF is high, Q2 is off). During power down

mode, the VOUT(SC2) circuitry is active and monitors for overload conditions on OUT.

Power on

When VIN exceeds the UVLO threshold, the DIO5907x powers up. While VIN is below VBAT + VIN(DT), the host

commands at the control inputs (/CE, EN1 and EN2) are ignored. The Q1 FET connected between IN and OUT

pins is off, and the status outputs /CHG and /PGOOD are high impedance. The Q2 FET that connects BAT to

OUT is ON. (If SYSOFF is high, Q2 is off). During this mode, the VOUT(SC2) circuitry is active and monitors for

overload conditions on OUT.

Once VIN rises above VBAT + VIN(DT), /PGOOD is driven low to indicate the valid power status and the /CE, EN1,

and EN2 inputs are read. The device enters standby mode if EN1 = EN2 = HI or if an input overvoltage

condition occurs. In standby mode, Q1 is OFF and Q2 is ON so OUT is connected to the battery input. (If

SYSOFF is high, FET Q2 is off). During this mode, the VOUT(SC2) circuitry is active and monitors for overload

conditions on OUT.

When the input voltage at IN is within the valid range: VIN > UVLO and VIN > VBAT + VIN(DT) and VIN < VOVP, and

the EN1 and EN2 pins indicate that the USB suspend mode is not enabled [(EN1, EN2) ≠ (HI, HI)] all internal

timers and other circuit blocks are activated. If no short conditions exists, the device switches on the input FET

Q1 with a 100 mA current limit to checks for a short circuit at OUT. When VOUT is above VO(SC1), the FET Q1

switches to the current limit threshold set by EN1, EN2 and RILIM and the device enters into the normal

operation. During normal operation, the system is powered by the input source (Q1 is regulating), and the

device continuously monitors the status of /CE, EN1 and EN2 as well as the input voltage conditions.