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PSD813F1 데이터시트(PDF) 93 Page - STMicroelectronics |
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PSD813F1 데이터시트(HTML) 93 Page - STMicroelectronics |
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93 / 120 page ![]() Preliminary PSD813F1-A 89 Symbol Parameter Conditions Min Typ Max Unit tNLNH Warm RESET Active Low Time (Note 1) 150 ns tOPR RESET High to Operational Device 120 ns tNLNH-PO Power On Reset Active Low Time 1ms (Note 2) Reset Timing (5 V ± 10%) NOTE: 1. tCLCL is the CLKIN clock period. Microcontroller Interface – PSD813F1 AC/DC Parameters (5V ± 10% Versions) Symbol Parameter Conditions Min Typ Max Unit tBVBH Vstby Detection to Vstbyon Output High 20 µs tBXBL Vstby Off Detection to Vstbyon Output Low 20 µs Vstbyon Timing (5 V ± 10%) -90 -12 -15 Symbol Parameter Conditions Min Max Min Max Min Max Unit tLVDV ALE Access Time from Power Down 90 120 150 ns Maximum Delay from tCLWH APD Enable to Internal Using CLKIN Input 15 * tCLCL (Note 1) µs PDN Valid Signal Power Down Timing (5 V ± 10%) NOTE: 1. RESET will not reset Flash or EEPROM programming/erase cycles. 2. tNLNH-PO is 10 ms for devices manufactured before rev. A. |
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