PSD813F1 datasheet(61/120 Pages) STMICROELECTRONICS

부품명	PSD813F1

상세설명	Flash In-System Programmable ISP Peripherals For 8-bit MCUs

PDF	120 Pages

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제조업체	STMICROELECTRONICS [STMicroelectronics]

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Preliminary

PSD813F1-A

The

PSD813F1

Functional

Blocks

(cont.)

PSEL0

PSEL1

PSEL

VM REGISTER BIT 7

PA0 - PA7

D0-D7

DATA BUS

Figure 25. Peripheral I/O Mode

9.4.3 Port Configuration Registers (PCRs)

Each port has a set of PCRs used for configuration. The contents of the registers can be

accessed by the microcontroller through normal read/write bus cycles at the addresses

given in Table 7. The addresses in Table 7 are the offsets in hex from the base of the

CSIOP register.

The pins of a port are individually configurable and each bit in the register controls its

respective pin. For example, Bit 0 in a register refers to Bit 0 of its port. The three PCRs,

shown in Table 23, are used for setting the port configurations. The default power-up state

for each register in Table 23 is 00h.

Port

MCU Access

Control

A,B

Write/Read

Direction

A,B,C,D

Write/Read

Drive Select*

A,B,C,D

Write/Read

Table 23. Port Configuration Registers

*NOTE: See Table 27 for Drive Register bit definition.

PSD813F1 데이터시트(PDF) 61 Page - STMicroelectronics