PSD813F1 datasheet(16/120 Pages) STMICROELECTRONICS

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PSD813F1-A

Preliminary

Table 5.

PSD813F1

Descriptions

(cont.)

Pin Name Pin*

Type

Description

PC2

I/O

PC2 pin of Port C. This port pin can be configured to have

the following functions:

1. MCU I/O — write to or read from a standard output or

input port.

2. CPLD Micro

⇔Cell (McellBC2) output.

3. Input to the PLDs.

4. Vstby — SRAM standby voltage input for SRAM battery

backup.

This pin can be configured as a CMOS or Open Drain output.

PC3

I/O

PC3 pin of Port C. This port pin can be configured to have

the following functions:

1. MCU I/O — write to or read from a standard output or

input port.

2. CPLD Micro

⇔Cell (McellBC3) output.

3. Input to the PLDs.

4. TSTAT output** for the JTAG interface.

5. Rdy/Bsy output for in-system parallel programming.

This pin can be configured as a CMOS or Open Drain output.

PC4

I/O

PC4 pin of Port C. This port pin can be configured to have

the following functions:

1. MCU I/O — write to or read from a standard output or

input port.

2. CPLD Micro

⇔Cell (McellBC4) output.

3. Input to the PLDs.

4. TERR output** for the JTAG interface.

5. Vbaton — battery backup indicator output. Goes high

when power is being drawn from an external battery.

This pin can be configured as a CMOS or Open Drain output.

PC5

I/O

PC5 pin of Port C. This port pin can be configured to have

the following functions:

1. MCU I/O — write to or read from a standard output or

input port.

2. CPLD Micro

⇔Cell (McellBC5) output.

3. Input to the PLDs.

4. TDI input** for the JTAG interface.

This pin can be configured as a CMOS or Open Drain output.

PC6

I/O

PC6 pin of Port C. This port pin can be configured to have

the following functions:

1. MCU I/O — write to or read from a standard output or

input port.

2. CPLD Micro

⇔Cell (McellBC6) output.

3. Input to the PLDs.

4. TDO output** for the JTAG interface.

This pin can be configured as a CMOS or Open Drain output.

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