H838532H datasheet(341/508 Pages) RENESAS

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Section 10 Serial Communication Interface

Rev. 1.00 May 30, 2008 Page 321 of 484

REJ09B0436-0100

Transmitting: Figure 10.6 shows an example of a flowchart for data transmission. This procedure

should be followed for data transmission after initializing SCI3.

Start

End

Read bit TDRE

in SSR

Sets bits SPC31 and

SPC32 to 1 in SPCR

Write transmit

data to TDR

Read bit TEND

in SSR

Set PDR = 0,

PCR = 1

Clear bit TE to 0

in SCR3

TDRE = 1?

Yes

Continue data

transmission?

TEND = 1?

Yes

Break output?

Read the serial status register (SSR)

and check that bit TDRE is set to 1,

then write transmit data to the transmit

data register (TDR). When data is

written to TDR, bit TDRE is cleared to 0

automatically.

(After the TE bit is set to 1, one frame of

1s is output, then transmission is possible.)

When continuing data transmission,

be sure to read TDRE = 1 to confirm that

a write can be performed before writing

data to TDR. When data is written to

TDR, bit TDRE is cleared to 0

automatically.

If a break is to be output when data

transmission ends, set the port PCR to 1

and clear the port PDR to 0, then clear bit

TE in SCR3 to 0.

Figure 10.6 Example of Data Transmission Flowchart (Asynchronous Mode)

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