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H838532H 데이터시트(PDF) 280 Page - Renesas Technology Corp |
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H838532H 데이터시트(HTML) 280 Page - Renesas Technology Corp |
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280 / 508 page ![]() Section 9 Timers Rev. 1.00 May 30, 2008 Page 260 of 484 REJ09B0436-0100 9.5.5 Application Notes (1) Internal Clock Switching and TCG Operation Depending on the timing, TCG may be incremented by a switch between difference internal clock sources. Table 9.14 shows the relation between internal clock switchover timing (by write to bits CKS1 and CKS0) and TCG operation. When TCG is internally clocked, an increment pulse is generated on detection of the falling edge of an internal clock signal, which is divided from the system clock ( φ) or subclock (φw). For this reason, in a case like No. 3 in table 9.14 where the switch is from a high clock signal to a low clock signal, the switchover is seen as a falling edge, causing TCG to increment. Table 9.14 Internal Clock Switching and TCG Operation No. Clock Levels Before and After Modifying Bits CKS1 and CKS0 TCG Operation 1 Goes from low level to low level Clock before switching Clock after switching Count clock TCG N N+1 Write to CKS1 and CKS0 2 Goes from low level to high level Clock before switching Clock before switching Count clock TCG N N+1 N+2 Write to CKS1 and CKS0 |
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