H838532H datasheet(288/508 Pages) RENESAS

부품명	H838532H

상세설명	16-Bit Single-Chip Microcomputer H8 Family / H8/300H Super Low Power Series

PDF	508 Pages

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제조업체	RENESAS [Renesas Technology Corp]

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Section 9 Timers

Rev. 1.00 May 30, 2008 Page 268 of 484

REJ09B0436-0100

Bit 2: Watchdog timer on (WDON)

Bit 2 enables watchdog timer operation.

Bit 2

WDON

Description

Watchdog timer operation is disabled

(initial value)

Clearing condition:

Reset, or when TCSRWE = 1 and 0 is written in both B2WI and WDON

Watchdog timer operation is enabled

Setting condition:

When TCSRWE = 1 and 0 is written in B2WI and 1 is written in WDON

Counting starts when this bit is set to 1, and stops when this bit is cleared to 0.

Bit 1: Bit 0 write inhibit (B0WI)

Bit 1 controls the writing of data to bit 0 in TCSRW.

Bit 1

B0WI

Description

Bit 0 is write-enabled

Bit 0 is write-protected

(initial value)

This bit is always read as 1. Data written to this bit is not stored.

Bit 0: Watchdog timer reset (WRST)

Bit 0 indicates that TCW has overflowed, generating an internal reset signal. The internal reset

signal generated by the overflow resets the entire chip. WRST is cleared to 0 by a reset from the

RES pin, or when software writes 0.

H838532H 데이터시트(PDF) 288 Page - Renesas Technology Corp