7733 datasheet(220/940 Pages) RENESAS

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SERIAL I/O

7733 Group User’s Manual

8–17

8.2.7 UARTi baud rate register (BRGi)

The UARTi baud rate register (BRGi) is an 8-bit timer used only for UARTi. It generates a transfer clock

and has a reload register. Assuming that a value set in BRGi is “n” (n = 0016 to FF16), the BRGi divides

the count source frequency by (n + 1).

In the clock synchronous serial I/O mode, BRGi is valid when an internal clock is selected. At this time,

the BRGi’s output divided by 2 is the transfer clock.

In the UART mode, the BRGi is always valid. At this time, the BRGi’s output divided by 16 is the transfer

clock.

When a value is written to addresses 3116, 3916, and 6516, the value is also written to the timer and the

reload register whether transmission/reception is in progress or stopped. Therefore, when writing a value

to these addresses, be sure to perform it while transmission/reception is stopped.

Figure 8.2.13 shows the structure of BRGi and Figure 8.2.14 shows the block diagram of transfer clock

generating section.

8.2 Block description

Fig. 8.2.13 Structure of UARTi baud rate register (BRGi)

Fig. 8.2.14 Block diagram of transfer clock generating section

UART0 baud rate register (address 31 16)

UART1 baud rate register (address 39 16)

UART2 baud rate register (address 65 16)

Functions

Bit

At reset

7 to 0 Values 0016 to FF16 can be set.

Assuming that the set value = n, BRGi

divides the count source frequency by (n + 1).

Un-

defined

BRGi

1/2

Transmit control circuit

Receive control circuit

Transfer clock for transmit operation

Transfer clock for receive operation

Transmit control circuit

Receive control circuit

Transfer clock for transmit operation

Transfer clock for receive operation

BRGi

1/16

fi : Clock selected with the BRG count source selection bits (f2, f16, f64, or f512)

fEXT : Clock input to the CLKi pin (external clock)

1/16

fEXT

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