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IMX35 데이터시트(PDF) 34 Page - Freescale Semiconductor, Inc |
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IMX35 데이터시트(HTML) 34 Page - Freescale Semiconductor, Inc |
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34 / 148 page ![]() i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 6 Freescale Semiconductor 34 Figure 13. Write Data Latch Cycle Timing DIagram Figure 14. Read Data Latch Cycle Timing DIagram Table 29. NFC Timing Parameters1 ID Parameter Symbol Timing T = NFC Clock Cycle2 Example Timing for NFC Clock ≈ 33 MHz T = 30 ns Unit Min. Max. Min. Max. NF1 NFCLE setup time tCLS T – 1.0 ns — 29 — ns NF2 NFCLE hold time tCLH T – 2.0 ns — 25 — ns NF3 NFCE setup time tCS T – 1.0 ns — 29 — ns NF4 NFCE hold time tCH T – 2.0 ns — 209 — ns NFCLE NFCE NFWE NFALE NFIO[15:0] Data to NF NF9 NF8 NF1 NF5 NF3 NF6 NF11 NF10 NF7 NFCLE NFCE NFRE NFRB NFIO[15:0] Data from NF NF13 NF15 NF14 NF17 NF12 NF16 |
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