IMX35 datasheet(52/148 Pages) FREESCALE

부품명	IMX35

상세설명	i.MX35 Applications Processors for Industrial and Consumer Products

PDF	148 Pages

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제조업체	FREESCALE [Freescale Semiconductor, Inc]

홈페이지	http://www.freescale.com

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i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 6

Freescale Semiconductor

Figure 32. DDR2 SDRAM Write Cycle Timing Diagram

NOTE

These values are for DQ/DM slew rate of 1 V/ns and DQS slew rate of

1 V/ns. For different values use the derating table.

Figure 33. DDR2 SDRAM Write Cycle Parameters

PARAMETER

Symbol

DDR2-400

Unit

Min

Max

DDR17 DQ and DQM setup time to DQS (single-ended strobe)

tDS1(base)

0.025

—

DDR18 DQ and DQM hold time to DQS (single-ended strobe)

tDH1(base)

0.025

—

DDR19 Write cycle DQS falling edge to SDCLK output setup time.

tDSS

0.2

—

tCK

DDR20 Write cycle DQS falling edge to SDCLK output hold time.

tDSH

0.2

—

tCK

DDR21 DQS latching rising transitions to associated clock edges

tDQSS

–0.25

0.25

tCK

DDR22 DQS high level width

tDQSH

0.35

—

tCK

DDR23 DQS low level width

tDQSL

0.35

—

tCK

SDCLK

SDCLK_B

DQS (output)

DQ (output)

DQM (output)

Data

DDR17

DDR18

DDR19

DDR20

DDR21

DDR23

DDR22

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