IMX35 datasheet(43/148 Pages) FREESCALE

43 / 148 page

i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 6

Freescale Semiconductor

Figure 26. DTACK Read Access

Table 31. WEIM Asynchronous Timing Parameters Relative Chip Select Table

Ref No.

Parameter

Determination By

Synchronous Measured

Parameters1

Min

Max

(If 133 MHz is

supported by SoC)

Unit

WE31

CS[x] valid to Address valid

WE4 – WE6 – CSA2

—

3 – CSA

WE32

Address invalid to CS[x] invalid

WE7 – WE5 – CSN3

—3 – CSN

WE32A(

muxed

A/D

CS[x] valid to address invalid

WE4 – WE7 + (LBN + LBA + 1

– CSA2)

–3 + (LBN + LBA +

1 – CSA)

—ns

WE33

CS[x] valid to WE valid

WE8 – WE6 + (WEA – CSA)

—

3 + (WEA – CSA)

WE34

WE invalid to CS[x] invalid

WE7 – WE9 + (WEN – CSN)

—

3 – (WEN_CSN)

WE35

CS[x] valid to OE valid

WE10 – WE6 + (OEA – CSA)

—

3 + (OEA – CSA)

WE35A

(muxed

A/D)

CS[x] valid to OE valid

WE10 – WE6 + (OEA + RLBN

+ RLBA + ADH + 1 – CSA)

–3 + (OEA +

RLBN + RLBA +

ADH + 1 – CSA)

3 + (OEA + RLBN +

RLBA + ADH + 1 –

CSA)

WE36

OE invalid to CS[x] invalid

WE7 – WE11 + (OEN – CSN)

—

3 – (OEN – CSN)

WE37

CS[x] valid to BE[y] valid (read

access)

WE12 – WE6 + (RBEA – CSA)

—

3 + (RBEA4 – CSA)

WE38

BE[y] invalid to CS[x] invalid

(read access)

WE7 – WE13 + (RBEN – CSN)

—

3 – (RBEN5 – CSN)

WE39

CS[x] valid to LBA valid

WE14 – WE6 + (LBA – CSA)

—

3 + (LBA – CSA)

WE40

LBA invalid to CS[x] invalid

WE7 – WE15 – CSN

—

3 – CSN

Last Valid Address

Address V1

ADDR

DATA

LBA

EB[y]

CS [x]

Next Address

WE39

WE35

WE37

WE32

WE36

WE38

WE43

WE40

WE31

WE44

DATA

WE47

WE48

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