AT90SCR100 datasheet(17/433 Pages) ATMEL

17 / 433 page

TPR0327AY–SMS–30Jan09

AT90SCR100

Figure 5-3.

The X-, Y-, and Z-registers

In the different addressing modes these address registers have fixed displacement, automatic

increment, and automatic decrement functionality (see the instruction set reference for details).

5.6

Stack Pointer

The Stack is mainly used for storing temporary data, for storing local variables and for storing

return addresses after interrupts and subroutine calls. The Stack Pointer Register always points

to the top of the Stack. Note that the Stack is implemented as growing from higher memory loca-

tions to lower memory locations. This implies that a Stack PUSH command decreases the Stack

Pointer.

The Stack Pointer points to the data SRAM Stack area where the Subroutine and Interrupt

Stacks are located. This Stack space in the data SRAM must be defined by the program before

any subroutine calls are executed or interrupts are enabled. The Stack Pointer must be set to

point above 0x0100. The initial value of the stack pointer is the highest address of the internal

SRAM. The Stack Pointer is decremented by one when data is pushed onto the Stack with the

PUSH instruction, and it is decremented by two when the return address is pushed onto the

Stack with subroutine call or interrupt. The Stack Pointer is incremented by one when data is

popped from the Stack with the POP instruction, and it is incremented by two when data is

popped from the Stack with return from subroutine RET or return from interrupt RETI.

The AVR Stack Pointer is implemented as two 8-bit registers in the I/O space. The number of

bits actually used is implementation dependent.

5.7

Instruction Execution Timing

This section describes the general access timing concepts for instruction execution. The AVR

CPU is driven by the CPU clock clkCPU, directly generated from the selected clock source for the

chip. No internal clock division is used.

X-register

R27 (0x1B)

R26 (0x1A)

Y-register

R29 (0x1D)

R28 (0x1C)

Z-register

R31 (0x1F)

R30 (0x1E)

Bit

141312

0x3E (0x5E)

SP12

SP11

SP10

SP9

SP8

SPH

0x3D (0x5D)

SP7

SP6

SP5

SP4

SP3

SP2

SP1

SP0

SPH

7654

Read/write

R/W

Initial value

0001

0x10

1111

0xFF

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