AT90SCR100 datasheet(22/433 Pages) ATMEL

22 / 433 page

TPR0327AY–SMS–30Jan09

AT90SCR100

Figure 6-1.

Full Memory Map

6.2

SRAM Data Memory

Figure 6-1 shows how the AT90SCR100 SRAM Memory is organized.

The AT90SCR100 is a complex microcontroller with more peripheral units than can be sup-

ported within the 64 locations reserved in the Opcode of the IN and OUT instructions. For the

Extended I/O space from 0x0060 - 0x00FF in SRAM, only the ST/STS/STD and LD/LDS/LDD

instructions can be used.

The address range $00 - $10FF Data Memory address the Register File, the I/O Memory,

Extended I/O Memory, and the internal data SRAM. The first 32 locations address the Register

file, the next 64 location the standard I/O Memory, then 160 locations of Extended I/O memory

and the next 4,096 locations address the internal data SRAM.

The five different addressing modes for the data memory cover: Direct, Indirect with Displace-

ment, Indirect, Indirect with Pre-decrement, and Indirect with Post-increment. In the Register file,

registers R26 to R31 feature the indirect addressing pointer registers.

The direct addressing reaches the entire data space.

The Indirect with Displacement mode reaches 63 address locations from the base address given

by the Y- or Z-register.

Application Flash Section

16 bits

0x0000

0x001F

0x0020

0x005F

0x0060

0x00FF

0x0100

0x10FF

0x1000

0x0000

0x6FFF

0x7000

0x7FFF

Boot Flash Section

Program Memory

SRAM Memory

IO Registers

32 General Purpose

Working Registers

Peripheral Registers

EEPROM Data

Memory

EEPROM Memory

Data Memory

8 bits

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