AT90SCR100 datasheet(339/433 Pages) ATMEL

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339

TPR0327AY–SMS–30Jan09

AT90SCR100

25. AES 128/256 Engine

To support all the security needs and requirements of embedded systems, the AT90SCR100

features a hardware AES engine. It provides an efficient and easy way to perform standard cryp-

tographic calculus.

25.1

Features

• 128 and 256 bits key length

• Encryption and Decryption algorithm

• Supports ECB, CBC, and MAC algorithms

• Specific Encryption/Decryption key generation for optimized revet algorithm

• Auto-incremented pointer register on data write for fast data loading

• Interrupt generation on calculus completion

25.2

Overview

The AES module of the AT90SCR100 includes an internal memory, dedicated to AES manage-

ment. These registers are not directly accessible from the AVR core, and the user must use a

specific interface to write both key and data.

The AES module can only manage one data block of 128 bits at a time.

The figure below shows how to access the internal memory of the AES block:

Figure 25-1.

AES Block Interface

AES Key Register

AES Engine

AES Control

System

AES Block

AES Data Register

Internal Memory

0x00

0x31

0x15

AESDR

AESADDR

AESACR

Address Decoder

AESACR.KD

AESACR.KD=0

AESACR.KD=1

AES Interrupt signal

AT90SCR100 데이터시트(PDF) 339 Page - ATMEL Corporation

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