| 전자부품 데이터시트 검색엔진 |
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ATtiny43U 데이터시트(PDF) 71 Page - ATMEL Corporation |
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ATtiny43U 데이터시트(HTML) 71 Page - ATMEL Corporation |
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71 / 182 page ![]() 71 8048B–AVR–03/09 • Port A, Bit 4 – AIN0/PCINT4 AIN0: Analog Comparator Positive Input. Configure the port pin as input with the internal pull-up switched off to avoid the digital port function from interfering with the function of the Analog Comparator. PCINT4: Pin Change Interrupt source 4. The PA4 pin can serve as an external interrupt source for pin change interrupt 0. • Port A, Bit 5 – AIN1/PCINT5 AIN1: Analog Comparator Negative Input. Configure the port pin as input with the internal pull-up switched off to avoid the digital port function from interfering with the function of the Analog Comparator. PCINT5: Pin Change Interrupt source 5. The PA5 pin can serve as an external interrupt source for pin change interrupt 0. • Port A, Bit 6 – CLKI/PCINT6 CLKI: External Clock Input. When used as a clock pin, the pin can not be used as an I/O pin. PCINT6: Pin Change Interrupt source 6. The PA6 pin can serve as an external interrupt source for pin change interrupt 0. • Port A, Bit 7 – RESET/dW/PCINT7 RESET: External Reset input is active low and enabled by unprogramming (“1”) the RSTDISBL Fuse. Pullup is activated and output driver and digital input are deactivated when the pin is used as the RESET pin. dW: When the debugWIRE Enable (DWEN) Fuse is programmed and Lock bits are unpro- grammed, the debugWIRE system within the target device is activated. The RESET port pin is configured as a wire-AND (open-drain) bi-directional I/O pin with pull-up enabled and becomes the communication gateway between target and emulator. PCINT7: Pin Change Interrupt source 7. The PA7 pin can serve as an external interrupt source for pin change interrupt 0. |
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