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ATtiny43U 데이터시트(PDF) 97 Page - ATMEL Corporation |
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ATtiny43U 데이터시트(HTML) 97 Page - ATMEL Corporation |
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97 / 182 page ![]() 97 8048B–AVR–03/09 • Bit 1 – OCFnA: Output Compare Flag n A The OCFnA bit is set when a Compare Match occurs between the Timer/Countern and the data in OCRnA – Output Compare Registern A. OCFnA is cleared by hardware when executing the corresponding interrupt handling vector. Alternatively, OCFnA is cleared by writing a logic one to the flag. When the I-bit in SREG, OCIEnA (Timer/Countern Compare Match Interrupt Enable), and OCFnA are set, the Timer/Countern Compare Match Interrupt is executed. • Bit 0 – TOVn: Timer/Countern Overflow Flag The bit TOVn is set when an overflow occurs in Timer/Countern. TOVn is cleared by hardware when executing the corresponding interrupt handling vector. Alternatively, TOVn is cleared by writing a logic one to the flag. When the SREG I-bit, TOIEn (Timer/Countern Overflow Interrupt Enable), and TOVn are set, the Timer/Countern Overflow interrupt is executed. |
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