ATtiny43U datasheet(4/182 Pages) ATMEL

4 / 182 page

8048B–AVR–03/09

ATtiny43U

Overview

The ATtiny43U is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC

architecture. By executing powerful instructions in a single clock cycle, the ATtiny43U achieves

throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power con-

sumption versus processing speed.

Figure 2-1.

Block Diagram

The AVR core combines a rich instruction set with 32 general purpose working registers. All the

32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent

registers to be accessed in one single instruction executed in one clock cycle. The resulting

STACK

POINTER

SRAM

PROGRAM

COUNTER

BOOST

CONVERTER

PROGRAMMING

LOGIC

ISP

INTERFACE

INTERNAL

OSCILLATOR

WATCHDOG

TIMER

MCU CONTROL

MCU STATUS

TIMER/

COUNTER0

TIMER/

COUNTER1

CALIBRATED

OSCILLATOR

TIMING AND

CONTROL

INTERRUPT

UNIT

EEPROM

ANALOG

COMPARATOR

ADC

POWER

SUPERVISION

POR

BOD

RESET

ON-CHIP

DEBUG

VOLTAGE

REFERENCE

GENERAL

PURPOSE

REGISTERS

ALU

STATUS

PROGRAM

FLASH

INSTRUCTION

DECODER

CONTROL

LINES

DATA REGISTER

PORT A

DIRECTION REG.

PORT A

DRIVERS

PORT A

VCC

VBAT

LSW

RESET

DATA REGISTER

PORT B

DIRECTION REG.

PORT B

DRIVERS

PORT B

GND

USI

PA7:0

PB7:0

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