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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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910GL 데이터시트(PDF) 182 Page - Intel Corporation |
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910GL 데이터시트(HTML) 182 Page - Intel Corporation |
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182 / 426 page  Integrated Graphics Device Registers (D2:F0) (Intel® 82915G/82915GV/82915GL/ 82910GL GMCH Only) R 182 Datasheet 9.1.12 GMADR—Graphics Memory Range Address (D2:F0) PCI Device: 2 Address Offset: 18h Default Value: 00000008h Access: RO, R/W/L Size: 16 bits IGD graphics memory base address is specified in this register. Bit Access & Default Description 31:28 R/W 0h Memory Base Address: Set by the OS, these bits correspond to address signals [31:28]. 27 R/W/L 0b 256-MB Address Mask: This bit is either part of the Memory Base Address (R/W) or part of the Address Mask (RO), depending on the value of MSAC[1]. See MSAC (Dev 2, Func 0, offset 62) for details. 26:4 RO 000000h Address Mask: Hardwired to 0s to indicate at least 128-MB address range 3 RO 1b Prefetchable Memory: Hardwired to 1 to enable prefetching 2:1 RO 00b Memory Type: Hardwired to 0 to indicate 32-bit address. 0 RO 0b Memory/IO Space: Hardwired to 0 to indicate memory space. |
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