910GL datasheet(193/426 Pages) INTEL

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Device 2 Function 1 (D2:F1) Configuration Registers

(Intel® 82915G/82915GV/82915GL/ 82910GL Only)

Datasheet

193

Device 2 Function 1 (D2:F1)

Configuration Registers

(Intel

® 82915G/82915GV/82915GL/

82910GL Only)

Table 10-1. Device 2 Function 1 Register Address Map Summary

Address

Offset

Symbol

Default

Value

Access

00–01h

VID2

Vendor Identification

8086h

02–03h

DID2

Device Identification

2780h

04–05h

PCICMD2

PCI Command

0000h

RO, R/W

06–07h

PCISTS2

PCI Status

0090h

08h

RID2

Revision Identification

See register

description

09–0Bh

Class Code Register

03800h

0Ch

CLS

Cache Line Size

00h

0Dh

MLT2

Master Latency Timer

00h

0Eh

HDR2

Header Type Register

80h

0Fh

—

Reserved

—

10–13h

MMADR

Memory Mapped Range Address

00000000h

RO, R/W

14–2Bh

—

Reserved

—

2C–2Dh

SVID2

Subsystem Vendor Identification

0000h

R/WO

2E–2Fh

SID2

Subsystem Identification

0000h

R/WO

30–33h

ROMADR

Video BIOS ROM Base Address

00000000h

34h

CAPPOINT

Capabilities Pointer

D0h

35–3Dh

—

Reserved

—

3Eh

MINGNT

Minimum Grant Register

00h

3Fh

MAXLAT

Maximum Latency

00h

40–43h

—

Reserved

—

44h

MCAPPTR

Mirror of Dev0 Capability Pointer

45–47h

—

Reserved

—

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