910GL datasheet(211/426 Pages) INTEL

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System Address Map

Datasheet

211

11.2

Main Memory Address Range (1 MB to TOLUD)

This address range extends from 1 MB to the top of physical memory that is permitted to be

accessible by the (G)MCH (as programmed by in the TOLUD register). All accesses to addresses

within this range will be forwarded by the (G)MCH to the main memory unless they fall into the

optional TSEG, optional ISA Hole, or optional IGD stolen VGA memory.

The (G)MCH provides a maximum main memory address decode space of 4 GB. The (G)MCH

does not remap APIC or PCI Express memory space. This means that as the amount of physical

memory populated in the system reaches 4 GB, there will be physical memory that exists, yet non-

addressable; therefore, this memory is unusable by the system.

The (G)MCH does not limit main memory address space in hardware.

Figure 11-3. Main Memory Address Range

Flash

Contains

programmable

windows, ICH6/PCI

ranges.

TOLUD

Main_Mem_Addr_G-P_Only

APIC

PCI Memory Range

0010_000h

IGD (1–32 MB, optional)

TSEG (1 MB / 2 MB /

8 MB, optional)

Main Memory

ISA Hole (optional)

Main Memory

DOS Compatibility

Memory

00F0_000h

0100_000h

0 MB

1 MB

15 MB

16 MB

4 GB Maximum

FFFF_FFFFh

11.2.1

ISA Hole (15 MB–16 MB)

BIOS can create a hole at 15 MB–16 MB. Accesses within this hole are forwarded to the DMI.

The range of physical main memory disabled by opening the hole is not remapped to the top of

the memory; that physical main memory space is not accessible. This 15 MB–16 MB hole is an

optionally enabled ISA hole.

910GL 데이터시트(PDF) 211 Page - Intel Corporation

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