| 전자부품 데이터시트 검색엔진 |
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CY8C53 데이터시트(PDF) 60 Page - Cypress Semiconductor |
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CY8C53 데이터시트(HTML) 60 Page - Cypress Semiconductor |
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60 / 106 page ![]() PRELIMINARY PSoC® 5: CY8C53 Family Datasheet Document Number: 001-66237 Rev. *A Page 60 of 106 Note 14. Based on device characterization (Not production tested). Table 11-3. AC Specifications[14] Parameter Description Conditions Min Typ Max Units FCPU CPU frequency DC – 67.01 MHz FBUSCLK Bus frequency DC – 67.01 MHz Svdd VDD ramp rate – – 1 V/ns TIO_INIT Time from VDDD/VDDA/VCCD/VCCA ≥ IPOR to I/O ports set to their reset states – – 10 µs TSTARTUP Time from VDDD/VDDA/VCCD/VCCA ≥ min operating voltage to CPU executing code at reset vector No PLL used, IMO boot mode 12 MHz typ. – – 66 µs TSLEEP Wakeup from limited active mode – Application of non-LVD interrupt to beginning of execution of next CPU instruction – 20 – µs THIBERNATE Wakeup form hibernate mode – Application of external interrupt to beginning of execution of next CPU instruction – – 100 µs [+] Feedback |
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