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CY8C53 데이터시트(PDF) 65 Page - Cypress Semiconductor

부품명 CY8C53
상세설명  Programmable System-on-Chip (PSoC) DC to 67 MHz operation
PDF  106 Pages
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제조업체  CYPRESS [Cypress Semiconductor]
홈페이지  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY8C53 데이터시트(HTML) 65 Page - Cypress Semiconductor

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PRELIMINARY
PSoC® 5: CY8C53 Family Datasheet
Document Number: 001-66237 Rev. *A
Page 65 of 106
11.4.2 SIO
Table 11-11. SIO DC Specifications
Parameter
Description
Conditions
Min
Typ
Max
Units
Vinmax
Maximum input voltage
All allowed values of Vddio and
Vddd, see Section 11.2.1
––
5.5
V
Vinref
Input voltage reference (Differential
input mode)
0.5
–
0.52
× V
DDIO
V
Voutref
Output voltage reference (Regulated output mode)
VDDIO > 3.7
1
–
VDDIO – 1
V
VDDIO < 3.7
1
–
VDDIO – 0.5
V
VIH
Input voltage high threshold
GPIO mode
CMOS input
0.7
× V
DDIO
––
V
Differential input mode[21]
Hysteresis disabled
SIO_ref + 0.2
–
–
V
VIL
Input voltage low threshold
GPIO mode
CMOS input
–
–
0.3
× V
DDIO
V
Differential input mode[21]
Hysteresis disabled
–
–
SIO_ref – 0.2
V
VOH
Output voltage high
Unregulated mode
IOH = 4 mA, VDDIO = 3.3 V
VDDIO – 0.4
–
–
V
Regulated mode[21]
IOH = 1 mA
SIO_ref – 0.65
–
Voutref + 0.2
V
Regulated mode[21]
IOH = 0.1 mA
SIO_ref – 0.3
–
SIO_ref + 0.2
V
VOL
Output voltage low
VDDIO = 3.30 V, IOL = 25 mA
–
–
0.8
V
Rpullup
Pull-up resistor
3.5
5.6
8.5
k
Ω
Rpulldown
Pull-down resistor
3.5
5.6
8.5
k
Ω
IIL
Input leakage current (absolute
value)[22]
VIH < Vddsio
25 °C, Vddsio = 3.0 V, VIH = 3.0 V
–
–
14
nA
VIH > Vddsio
25 °C, Vddsio = 0 V, VIH = 3.0 V
–
–
10
µA
CIN
Input Capacitance[22]
––
7
pF
VH
Input voltage hysteresis
(Schmitt-Trigger)[22]
Single ended mode (GPIO mode)
–
40
–
mV
Differential mode
–
35
–
mV
Idiode
Current through protection diode to
VSSIO
––
100
µA
Notes
21. See Figure 6-9 on page 28 and Figure 6-12 on page 31 for more information on SIO reference.
22. Based on device characterization (Not production tested).
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