STM32F407IE datasheet(91/154 Pages) STMICROELECTRONICS

91 / 154 page

STM32F405xx, STM32F407xx

Electrical characteristics

Doc ID 022152 Rev 1

91/154

Figure 28.

I/O AC characteristics definition

Fmax(IO)out Maximum frequency

(3)

CL = 30 pF, VDD > 2.70 V

100(4)

MHz

CL = 30 pF, VDD > 1.8 V

50(4)

CL = 10 pF, VDD > 2.70 V

200(4)

CL = 10 pF, VDD > 1.8 V

TBD

tf(IO)out

Output high to low level fall

time

CL = 20 pF, 2.4 < VDD < 2.7 V

TBD

CL = 10 pF, VDD > 2.7 V

TBD

tr(IO)out

Output low to high level rise

time

CL = 20 pF, 2.4 < VDD < 2.7 V

TBD

CL = 10 pF, VDD > 2.7 V

TBD

-tEXTIpw

Pulse width of external signals

detected by the EXTI

controller

The I/O speed is configured using the OSPEEDRy[1:0] bits. Refer to the STM32F20/21xxx reference manual for a

description of the GPIOx_SPEEDR GPIO port output speed register.

TBD stands for “to be defined”.

The maximum frequency is defined in Figure 28.

For maximum frequencies above 50 MHz, the compensation cell should be used.

Table 45.

I/O AC characteristics(1)(2) (continued)

OSPEEDRy

[1:0] bit

value(1)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

ai14131

10%

90%

50%

tr(IO)out

OUTPUT

EXT ERNAL

ON 50pF

Maximum fr equency is achieved if (tr + tf) ≤ 2/3)T and if the duty cycle is (45-55%)

10%

50%

90%

when loaded by 50pF

tr(IO)out

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