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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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STM32F407IE 데이터시트(PDF) 118 Page - STMicroelectronics |
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STM32F407IE 데이터시트(HTML) 118 Page - STMicroelectronics |
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118 / 154 page  Electrical characteristics STM32F405xx, STM32F407xx 118/154 Doc ID 022152 Rev 1 Figure 48. Asynchronous multiplexed PSRAM/NOR read waveforms tv(A_NE) FSMC_NEx low to FSMC_A valid - TBD ns th(A_NWE) Address hold time after FSMC_NWE high TBD - ns tv(BL_NE) FSMC_NEx low to FSMC_BL valid - TBD ns th(BL_NWE) FSMC_BL hold time after FSMC_NWE high TBD - ns tv(Data_NE) FSMC_NEx low to Data valid - TBD ns th(Data_NWE) Data hold time after FSMC_NWE high TBD - ns tv(NADV_NE) FSMC_NEx low to FSMC_NADV low - TBD ns tw(NADV) FSMC_NADV low time - TBD ns 1. CL = 15 pF. 2. Preliminary values. 3. TBD stands for “to be defined”. Table 71. Asynchronous non-multiplexed SRAM/PSRAM/NOR write timings(1)(2)(3) Symbol Parameter Min Max Unit NBL Data FSMC_NBL[1:0] FSMC_AD[15:0] tv(BL_NE) th(Data_NE) Address FSMC_A[25:16] tv(A_NE) FSMC_NWE t v(A_NE) ai14892b Address FSMC_NADV t v(NADV_NE) tw(NADV) tsu(Data_NE) th(AD_NADV) FSMC_NE FSMC_NOE tw(NE) t w(NOE) tv(NOE_NE) t h(NE_NOE) th(A_NOE) th(BL_NOE) tsu(Data_NOE) th(Data_NOE) |
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