PIC24F16KA102 datasheet(54/278 Pages) MICROCHIP

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PIC24F16KA102 FAMILY

DS39927C-page 54

 2008-2011 Microchip Technology Inc.

6.4.1

ERASE DATA EEPROM

The data EEPROM can be fully erased, or can be

partially erased, at three different sizes: one word, four

words or eight words. The bits, NVMOP<1:0>

(NVMCON<1:0>), decide the number of words to be

erased. To erase partially from the data EEPROM, the

following sequence must be followed:

Configure NVMCON to erase the required

number of words: one, four or eight.

Load TBLPAG and WREG with the EEPROM

address to be erased.

Clear NVMIF status bit and enable NVM

interrupt (optional).

Write the key sequence to NVMKEY.

Set the WR bit to begin erase cycle.

Either poll the WR bit or wait for the NVM

interrupt (NVMIF set).

A typical erase sequence is provided in Example 6-2.

This example shows how to do a one-word erase. Sim-

ilarly, a four-word erase and an eight-word erase can

be done. This example uses ‘C’ library procedures to

manage the Table Pointer (builtin_tblpage and

builtin_tbloffset

) and the Erase Page Pointer

(builtin_tblwtl). The memory unlock sequence

(builtin_write_NVM) also sets the WR bit to initiate

the operation and returns control when complete.

EXAMPLE 6-2:

SINGLE-WORD ERASE

int __attribute__ ((space(eedata))) eeData = 0x1234; // Variable located in EEPROM

unsigned int offset;

// Set up NVMCON to erase one word of data EEPROM

NVMCON = 0x4058;

// Set up a pointer to the EEPROM location to be erased

TBLPAG = __builtin_tblpage(&eeData);

// Initialize EE Data page pointer

offset = __builtin_tbloffset(&eeData);

// Initizlize lower word of address

__builtin_tblwtl(offset, 0);

// Write EEPROM data to write latch

asm volatile ("disi #5");

// Disable Interrupts For 5 Instructions

__builtin_write_NVM();

// Issue Unlock Sequence & Start Write Cycle

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