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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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TNETX3100PGC 데이터시트(PDF) 74 Page - Texas Instruments |
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TNETX3100PGC 데이터시트(HTML) 74 Page - Texas Instruments |
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74 / 80 page  TNETX3100 ThunderSWITCH™ 10-PORT 10-/100-MBIT/S ETHERNET™ SWITCH SPWS031D – JUNE 1997 – REVISED OCTOBER 1997 74 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 operating characteristics (see Figure 25) MII transmit 100 Mbit/s (xx=ports 00–01) NO. PARAMETER MIN MAX UNIT 1 td(MXXTXD)1 Delay time, from MXXTCLK ↑ to MXXTXD3–MXXTXD0 valid 5 25 ns 1 td(MXXTXD)2 Delay time, from MXXTCLK ↑ to MXXTXD7–MXXTXD0 valid 5 25 ns 1 td(MXXTXEN) Delay time, from MXXTCLK ↑ to MXXTXEN valid 5 25 ns 1 td(MXXTXER) Delay time, from MXXTCLK ↑ to MXXTXER valid 5 25 ns MXXTXD3–MXXTXD0 is driven by the reconciliation sublayer synchronous to the MXXTCLK. MXXTXEN is asserted and deasserted by the reconciliation sublayer synchronous to the MXXTCLK rising edge. MXXTXER is driven synchronous to the rising edge of MXXTCLK (xx = 00–01). MXXTCLK (input) MXXTXD3–MXXTXD0 MXXTXEN MXXTXER (outputs) 1 Figure 25. Ports (00–01) Transmit Interface Timing |
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