CXD3003 datasheet(107/137 Pages) SONY

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CXD3003R

§5-15. Writing to the Coefficient RAM

The coefficient RAM can be rewritten by $34. All coefficients have default values in the built-in ROM, and

transfer from the ROM to the RAM is completed approximately 40µs (when MCK = 128Fs) after the XRST pin

rises. (The coefficient RAM cannot be rewritten during this period.)

After that, the characteristics of each built-in filter can be finely adjusted by rewriting the data for each address

of the coefficient RAM.

The coefficient rewrite command is comprised of 24 bits, with D14 to D8 of $34 as the address (D15 = 0) and

D7 to D0 as data. Coefficient rewriting is completed 11.3µs (when MCK = 128Fs) after the command is

received. When rewriting multiple coefficients, be sure to wait 11.3µs (when MCK = 128Fs) before sending the

next rewrite command.

§5-16. PWM Output

FCS, TRK and SLD outputs are output as PWM waveforms.

In particular, FCS and TRK permit accurate drive by using a double oversampling noise shaper.

Timing Chart 5-20 and Fig. 5-21 show examples of output waveforms and drive circuits.

tMCK =

≈ 180ns

Timing Chart 5-20.

64tMCK

AtMCK

SFDR

SRDR

SLD

32tMCK

FCS/TRK

FFDR/

TFDR

FRDR/

TRDR

Output value +A

Output value –A

Output value 0

tMCK

MCK

(5.6448MHz)

↑ ↑ ↑ ↑ ↑ ↑ ↑

5.6448MHz

CXD3003 데이터시트(PDF) 107 Page - Sony Corporation